Fx2lib
0.2
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00001 // Copyright (C) 2010 Ubixum, Inc. 00002 // 00003 // This library is free software; you can redistribute it and/or 00004 // modify it under the terms of the GNU Lesser General Public 00005 // License as published by the Free Software Foundation; either 00006 // version 2.1 of the License, or (at your option) any later version. 00007 // 00008 // This library is distributed in the hope that it will be useful, 00009 // but WITHOUT ANY WARRANTY; without even the implied warranty of 00010 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 00011 // Lesser General Public License for more details. 00012 // 00013 // You should have received a copy of the GNU Lesser General Public 00014 // License along with this library; if not, write to the Free Software 00015 // Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA 00016 00043 typedef enum { 00044 IE0_ISR=0, 00045 TF0_ISR, 00046 IE1_ISR, 00047 TF1_ISR, 00048 TI_0_ISR, 00049 TF2_ISR, 00050 RESUME_ISR, 00051 TI_1_ISR, 00052 USBINT_ISR, 00053 I2CINT_ISR, 00054 IE4_ISR, 00055 IE5_ISR, 00056 IE6_ISR, 00057 // Better names for the USART interrupts 00058 USART0_ISR = TI_0_ISR, 00059 USART1_ISR = TI_1_ISR, 00060 } FX2_ISR; 00061 00065 #define INTERRUPT_HIGH_PRIO 1 00066 00069 #define INTERRUPT_LOW_PRIO 0 00070 00071 00072 // TIMER0 00073 // ======================================================================= 00074 00081 #define ENABLE_TIMER0() ET0=1 00082 00089 #define CLEAR_TIMER0() 00090 00091 // TIMER1 00092 // ======================================================================= 00093 00100 #define ENABLE_TIMER1() ET1=1 00101 00108 #define CLEAR_TIMER1() 00109 00110 // TIMER2 and external EXF2 interrupt 00111 // ======================================================================= 00112 00119 #define ENABLE_TIMER2() ET2=1 00120 00125 #define CLEAR_TIMER2() TF2=0;EXF2=0; 00126 00127 // Resume interrupt 00128 // ======================================================================= 00129 // After the FX2 has entered its idle state, it responds to an external signal 00130 // on its WAKEUP/WU2 pins or resumption of USB bus activity by restarting its 00131 // oscillator and resuming firmware execution. 00132 00136 #define ENABLE_RESUME() ERESI = 1 00137 00142 #define CLEAR_RESUME() RESI=0 00143 00144 // Interrupt 4 - Autovectored FIFO / GPIF or External interrupt 4 00145 // ======================================================================= 00146 00147 //#define ENABLE_INT4() 00148 00149 // External Interrupt 5 00150 // ======================================================================= 00151 00156 #define ENABLE_INT5() EIEX5=1 00157 00162 #define CLEAR_INT5() \ 00163 EXIF &= ~bmIE5 00164 00165 // USART0 00166 // ======================================================================= 00167 00178 #define SET_USART0_ISR_PRIORITY(p) \ 00179 PS0 = p 00180 00188 #define ENABLE_USART0() \ 00189 ES0 = 1; 00190 00193 #define CLEAR_USART0_RX() \ 00194 RI = 0; 00195 00198 #define CLEAR_USART0_TX() \ 00199 TI = 0; 00200 00203 #define CLEAR_USART0() \ 00204 CLEAR_USART0_RX(); \ 00205 CLEAR_USART0_TX(); 00206 00207 // USART1 00208 // ======================================================================= 00209 00220 #define SET_USART1_ISR_PRIORITY(p) \ 00221 PS1 = p 00222 00230 #define ENABLE_USART1() \ 00231 ES1 = 1; 00232 00235 #define CLEAR_USART1_RX() \ 00236 RI1 = 0; 00237 00240 #define CLEAR_USART1_TX() \ 00241 TI1 = 0; 00242 00245 #define CLEAR_USART1() \ 00246 CLEAR_USART1_RX(); \ 00247 CLEAR_USART1_TX(); 00248 00249 // I2C Interrupt 00250 // ======================================================================= 00251 00262 #define SET_I2C_ISR_PRIORITY(p) \ 00263 PI2C = p 00264 00272 #define ENABLE_I2C() \ 00273 EI2C = 1; 00274 00277 #define CLEAR_I2C() \ 00278 EXIF &= ~bmI2CINT;